1. Field of the Invention
The present invention relates to a semiconductor device and to a package for a semiconductor device, and more specifically it relates to the structure of a package for a semiconductor device that uses a metallic substrate.
2. Description of Related Art
A semiconductor package structure known as BGA (ball grid array) has been proposed in recent years. This type of package structure is noted, for example, in "Electronic News" of Monday, Mar. 6, 1995 (hereinafter referred to as reference 1) and on page 63 of the June 1995 issue of "Nikkei Microdevice" (hereinafter referred to as reference 2), and efforts are being made to achieve practical application thereof. The BGA structure of the past will be explained hereunder with reference to a drawing.
FIG. 10 shows a cross-sectional view of the BGA (Super BGA) of Amkor/Anam company as the first prior art, which is noted in reference 1.
In the structure of this package, an insulator 100 is provided on the top of a metallic substrate 97, and a prescribed wiring pattern 102 is further formed on the top thereof.
A wiring pattern 102 on which a solder ball 101 is to be bonded, is also provided.
With the exception of part of the wiring pattern onto which is provided the solder ball 101 and part of the wiring pattern which is used for wire bonding, the structure is covered by an insulator 105.
The metallic substrate 97 is exposed at the part on which is mounted a silicon chip 99, the silicon chip 99 being bonded thereto by using a mounting material 98.
The electrodes of this silicon chip 99 and prescribed locations of the wiring pattern are connected together by bonding wires 103. The silicon chip 99, the bonding wires 103, and the surrounding area thereof are sealed by a sealing resin.
FIG. 11 shows a cross-sectional view of the second prior art BGA, which is noted in reference 2. In the structure of this package, a wiring pattern 109 is formed on the top of an insulator 107. The electrodes of the silicon chip 108 and the ends of the wiring pattern 109 are electrically connected using TAB (tape automated bonding).
This construction is usually called as a device hole. The part of the insulator 107 at which the silicon chip 108 is mounted is removed. With the exception of the ends of the wiring pattern 109 onto which are provided solder balls 112, the electrodes of the silicon chip 108, and the ends of the wiring pattern 109 which are TAB connected to the electrodes of the silicon chip 108, the structure is covered by a covering insulator 110.
To maintain flatness, a support ring 106 is provided around the outer edges of the package. The silicon chip 108 and the surrounding area are sealed using a sealing resin 111.
In the BGA package structure described above as the first prior art, it is not possible to observe and inspect the condition of connection after mounting.
Additionally, with regard to the reliability of the connection after mounting is also unstable, and further since stress is generated in the connection part by virtue of the difference in coefficients of thermal expansion between the material of the substrate and the metal used in the package.
With regard to the BGA structure described above as the second prior art, it is difficult to effectively dissipate heat that is generated at the junction part of the silicon chip, making it difficult to achieve a low thermal resistance.
Additionally, because the part on which a solder ball is formed is a flexible film, heat which is applied then mounting causes a deterioration of the flatness thereof, resulting in a worsening of mounting yield.
Furthermore, because the part used for electrical connection is only one layer of the wiring pattern, it is not possible to use a laminated structure such as has been used in the past to improve ground and power supply potentials with ceramic packages.
There were a number of unsolved problems with regard to prior art BGA structures such as described above.
In view of the above-described prior art and the problems involved therewith, an object of the present invention is to provide a package structure which is an improvement over the BGA structure of the past, enables sufficient electrical performance to be achieved from an LSI device, promotes the achievement of a low thermal resistance, and facilitates mounting inspection.